1. Field of the Invention
The present invention relates to a semiconductor chip used for a chip-on-chip structure and a flip-chip bonding structure. Further, the present invention relates to a semiconductor device having a chip-on-chip structure.
2. Description of Related Art
As a structure for attempting to downsize and highly integrate a semiconductor device, a chip-on-chip structure and a flip-chip bonding structure have already been known, wherein the former joins the surface of a semiconductor chip to the surface of another semiconductor chip in an state opposed to each other, and the latter joins the surface of a semiconductor chip to a wiring substrate in a state opposed to each other.
A semiconductor chip applied to these structures is provided with a plurality of bumps made of a metal such as gold (Au) on the surface thereof. The respective bumps are electrically connected to internal circuits formed at the middle portion of the surface of the semiconductor chip. By joining together the bumps of one semiconductor chip and the bumps of another semiconductor chip with both thereof faced to each other in the chip-on-chip structure, mechanical connection between these semiconductor chips is completed, and at the same time, electrical connection between the internal circuits of the respective semiconductor chips is achieved. Further, by joining together the bumps of a semiconductor chip and a pad on a wiring substrate with both thereof faced to each other, the semiconductor chip is supported on the wiring substrate, and at the same time, electrical connection between the wiring on the wiring substrate and the internal circuits of the semiconductor chip is achieved.
As surge is brought in from the bump, there is a fear that the function elements, which compose the internal circuits, may be destroyed due to the surge. Therefore, a protection element that prevents surge from being brought in from the bump intervenes between the bump and the internal circuits.
However, in order to provide a protection element between the bump and the internal circuit, it is necessary to dispose a bump in a narrow region at the peripheral edge portion on the surface of the semiconductor chip. For this reason, freedom in the layout of bumps is remarkably restricted.
Further, if a plurality of bumps is disposed at the peripheral edge portion on the surface of respective semiconductor chips, uniformity in the stress between the middle portion of the semiconductor chip and the peripheral edge portion thereof may be lost when a force is given from the outside to the semiconductor chip. As a result, the semiconductor chip may be subjected to deformation (distortion).
Further, since the spacing between adjacent bumps in the direction along the surface of a semiconductor chip is narrow if bumps are concentratedly disposed at the peripheral edge portion of the semiconductor chip, there is a problem that resin is not smoothly flown into the inside region of the bumps when injecting resin (an under-filling material) to seal the clearance between one semiconductor chip and another semiconductor chip.